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RI-GIGEXD
(Prototype Package w/Internal Fan Shown with A2D Interface, Total Height = 1.65 In.)
(Production Package Module Shown with A2D Interface, Total Height = 1.65 In.) Description: The GIGExD is a self-contained data conversion device. Input data type interfaces include A/D, ECL, PECL, LVDS, etc that are converted to output Gigabit Ethernet data. Once digital data enters the GIGEXD it can be directly sent out via Gigabit Ethernet or, optionally, pass through embedded Digital Tuners for Tune, Filter, Decimate operations before output to Gigabit Ethernet. The output Gigabit Ethernet interface employs the use of the gigabit SFP modules which allow for either Copper RJ-45 or Fiber (850 or 1300nm) network connections. Its modular design allows for the use of standard ICE I/O modules. The I/O module data is converted to GigE traffic using Multicast UDP packets that conform to the SDDS protocol. The output SDDS packets are sent to a user defined Multicast address. Once in UDP/SDDS packet form, that data can be transferred over commercial network frameworks then acquired into a host computer via a network port or via an ICE PIC card using an SDDS I/O module. Operation: The GIGExD is programmable and configurable via its Gigabit Ethernet link. The module contains an IP address that is used for configuration or programming. A small C program is provided that will configure or program the module via a host systems' Gigabit Ethernet port. Or, configuration may be done using an ICE PIC card and UDP/SDDS module that is connected to the same network framework that the GIGExD occupies. (Note: configuration of the GIGExD may be done using ICEPIC card and UDP/SDDS interface module but programming has not been implemented as of yet. At a later date programming of the GIGExD via the ICEPIC/SDD module interface will be available.) Once configured via the ethernet, the device outputs data until reset or reconfigured again. Many options are available during configuration including the use of timecode to "time stamp" packets. For A/D data, the timecode source takes the form of IRIG B timecode that is converted inside the GIGExD to standard SDDS format and placed in packet headers. For digital modules, such as ECL, timecode is extracted from the serial stream of the data and converted to standard SDDS format and placed in the SDDS headers. Time stamping may also be turned off for simple data conversion with no SDDS timecode in the SDDS packet headers. Configuration: As mentioned above each GIGExD has it's own IP and it's own output Multicast address. The IP address is used for setting Data Type parameters within the GIGExD. Such parameters include timecode type, samples size (8 bit or 16 bit), and clock rate. Along with Data Type parameters, the GIGExD can have the Multicast address to which it sends data changed. Finally, the IP address of the GIGExD may be changed to allow for multiple GIGExD units with unique IP and Multicast addresses to operate in a single network framework. On each GIGExD module a "default button" is provided. This button when pressed and held for 2 seconds will return the GIGExD to its factory default IP address and Multicast output address. This allows for the user to return a GIGExD to a known IP address for updating of configuration or programming. All configuration and programming is stored on the GIGExD in flash memory. This allows for Data Type configuration, IP addresses, and Multicast addresses to remain through power cycles-whether the power cycles are intentional or not. Also, the use of flash memory to hold configuration means that a user can configure the parameters of the module and these parameters are now in use until re-programmed again. Once configured a GIGExD will run in its programmed mode until re-configured again. This allows for lower configuration cycles and maintenance. Programming: The GIGExD contains on-board FPGAs, clock synthesizers, and EPROMs. As updates to the programming of these devices are made available (via the World Wide Web or ICE software tree downloads), the GIGExD can be "re-programmed" to take advantage of these updates over any network framework. In other words, the GIGExD receives its programming over Gigabit Ethernet. And, as new updates become available, updating the GIGExD is simply a matter of executing the C program to reprogram the device with these new features. Specialized A/D Interface: Two specialized A/D interfaces have been designed to work with the GIGExD. The I/O module type names are A2DR7-D and A2DR9-D. The A2DR7-D has an on-board clock synthesizer chip that can be set to the range of 90-100MHz sample rate that is locked to an external 10MHz reference. From the 90-100MHz sample rate other frequencies can be provided that are divisions of 90-100MHz by a power of 2-for example: 45-50Mhz, and 22.5-25MHz. The A2DR7-D also allows for direct clocking at any rate via an on-board oscillator or via an external clock input. Software configuration allows user selection of clock sources. The A2DR7-D also provides for IRIG timecode and PPS inputs. These inputs are then used to time stamp the analog data. Past projects have employed the use of GPS receivers (Endrun Technologies Meridian Model Number 3019-0102-000) that output a 10MHz reference clock, IRIG timecode and a 1 PPS signal. The use of the on-board clock synthesizer was then used to digitize a 70MHz IF at 93MHz. The use of the A2DR7-D with the GIGExD in this configuration provided highly accurate time stamped data across multiple GIGExD units. The A2DR9-D has an on-board clock synthesizer chip that can be set to the range of 180-200MHz sample rate that is locked to an external 10MHz reference. From the 180-200MHz sample rate other frequencies can be provided that are divisions of 180-200MHz by a power of 2-for example: 90-100Mhz, 45-50Mhz, and 22.5-25MHz. The A2DR9-D also allows for direct clocking at any rate via an on-board oscillator or via an external clock input. Software configuration allows user selection of clock sources. As with the A2DR7-D, the A2DR9-D comes equipped with 1PPS and IRIG inputs for time stamping data. Software: A simple C program is used to program the GIGExD via a hosts computer's network port. A Linux build script is included with the software. Currently the program gigexdcfg.c resides in the test subdirectory of the ICE software tree. The programming file and configuration file reside in the dat directory of the ICE software tree. The configuration file gigexdusr.cfg is a text file that can be edited to reset IP, Multicast addresses, and data type configuration (Sample rate, number of bits, etc.) The program download file of gigexd.rpd in the dat directory of the ICE software tree is a binary file that should not be edited. This file is used to reprogram the FPGAs on the GIGExD as new features are added. The C program defaults to look for the definition of the ICEROOT environment variable to find these files when programming or configuring the GIGExD module. If the ICEROOT variable is not defined or if the user wishes a new path to the configuration or programming files may be specified. See the software page for a complete description and a download of the most recent C program, programming file, and configuration file. Documentation: Below is the GIGEXD User Guide. Incorporated into the User Guide is a 1 page "Quickstart" document for first time users. The User Guide (and Quickstart) is also available on the software page and bundled into the software/firmware zip package for download. The User Guide is a comprehensive document for first time and advanced users. For GIGEXD Rev 1 users version 1.9 is available. For GIGEXD Rev 2 users version 2.0 is available GIGEXD Rev1 User's Guide Version 1.9: GIGEXD_User_Guidev1_9.pdf GIGEXD Rev2 User's Guide Version 2.13: GIGEXD_User_Guidev2_13.pdf Mechanical: Both the Prototype and Production units come with screw holes on the bottom for mounting. The Prototype unit comes with an internal fan for cooling. The Production unit does not have an internal fan but instead has its internal circuitry cooled by conduction to its metal housing. Statement Of Volatility: The GIGEXD contains internal volatile RAM memory and one external FLASH EPROM. The external FLASH EPROM holds the GIGEXD programming and configuration between power cycles. The internal RAM memory holds user data while it is being processed until sent out Gigabit Ethernet via UDP/SDDS protocols. Removing power erases ALL user data held in the GIGEXD. The FLASH EPROM never holds user data but can be cleared for sanitization by executing the prgclrcfg command using the GIGEXD C program (see User Guide above). Using the prgclrcfg command will erase the FLASH EPROM configuration and programming then restore it's factory programming. Therefore, sanitization of the GIGEXD is a 2 step process. 1) Perform the prgclrcfg command. 2) Upon finishing the prgclrcfg command, remove power from the GIGEXD. Once steps 1 & 2 are completed the GIGEXD is sanitized. The link below will provide you with the above information in pdf format. Sanitization PDF: GIGEXD_Sanitization.pdf Features
I/O Modules The GIGEXD has a modular I/O interface. I/O modules are "daughter boards" that are attached to the GIGEXD motherboard to provide an electrical interface that is converted to Gigabit Ethernet UDP/SDDS data via the GIGEXD motherboard. These interfaces include Analog to Digital conversion and Differential Line Interfaces (LVDS, ECL, PECL, Differential TTL, etc.) Below are listed the GIGEXD I/O modules that can be ordered with the GIGEXD motherboard (above), assembled, and then shipped out as a complete unit. 1) RI-GE-DR2D-D (In Production) Differential Logic Interface (Follow Link For More Details) 2) RI-GE-A2DR7-D (In Production) 14 Bit A/D, Max Clock Rate 100Mhz, (Follow Link For More Details) 3) RI-GE-A2DR9-D (In Production) 12 Bit A/D, Max Clock Rate 200Mhz, Variable Gain Front End (Follow Link For More Details)
Rack Mount GIGEXD Configurations:
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